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1 for more information www.linear.com/LT8331 typical application features description low i q boost/sepic/ flyback/inverting converter with 0.5a, 140v switch the lt ? 8331 is a current mode dc/dc converter with a 140v, 0.5a switch operating from a 4.5v to 100v input. with a unique single feedback pin architecture, it is ca - pable of boost, sepic, flyback or inverting configurations. burst?mode operation consumes as low as 6a quiescent current to maintain high efficiency at very low output cur - rents, while keeping typical output ripple below 20mv. the internally-compensated current mode architecture results in stable operation over a wide range of input and output voltages and programmable switching frequencies between 100khz to 500khz. a sync/mode pin allows synchronization to an external clock. it can also be used to select between burst or pulse-skipping modes of operation. for increased efficiency, a bias pin can accept a second input to supply the intv cc regulator. additional features include frequency foldback and programmable soft-start for controlling inductor current during start-up. the LT8331 is available in a thermally-enhanced msop package with four pins removed for high voltage spacings. 48v output sepic converter applications n wide input voltage range: 4.5v to 100v n ultralow quiescent current and low ripple burst?mode ? operation: i q = 6a n 0.5a, 140v power switch n positive or negative output voltage programming with a single feedback pin n programmable frequency (100khz to 500khz) n synchronizable to an external clock n bias pin for higher efficiency n programmable undervoltage lockout (uvlo) n thermally-enhanced high voltage msop package n industrial and automotive n telecom n medical diagnostic equipment n portable electronics l , lt, ltc, ltm, linear technology, the linear logo, and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. efficiency and power loss LT8331 8331fa v out = 48v in sw1-2 en/uvlo LT8331 v in 36v to 72v 220h 1m 220h 150ma at v in = 36v 8331 ta01a 165ma at v in = 48v 190ma at v in = 72v sync/mode gnd fbx bias ss v out 450khz 4.7f 4 34.8k 1f 2 v rt intv cc efficiency power loss v in = 36v v in = 48v v in = 72v load current (ma) 2.2f 0 50 100 150 200 0 10 20 30 40 1m 50 60 70 80 90 100 0 0.5 1.0 1.5 59k 2.0 efficiency (%) power loss (w) 8331 ta01b 0.1f 63.4k 1f
2 for more information www.linear.com/LT8331 sw .......................................................................... 140 v v in , en/uvlo .......................................................... 10 0v bias .......................................................................... 6 0v en/uvlo pin above v in pin, sync ............................. 6v intv cc (note 2) .......................................................... 4v f bx ........................................................................... 4v o perating junction temperature (note 3) lt8 331 e, LT8331 i .............................. C 40 c to 125 c storage temperature range .................. C 65 c to 150 c lead temperature (soldering, 10 sec) ................... 30 0 c order information lead free finish tape and reel part marking* package description temperature range LT8331emse#pbf LT8331emse#trpbf 8331 16-lead plastic msop with 4 pins removed C40c to 125c LT8331imse#pbf LT8331imse#trpbf 8331 16-lead plastic msop with 4 pins removed C40c to 125c consult ltc ? marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. some packages are available in 500 unit reels through designated sales channels with #trmpbf suffix. 1 3 5 6 7 8 en/uvlo v in intv cc nc bias nc 16 14 12 11 10 9 sw1 sw2 sync/mode ss rt fbx top view 17 pgnd, gnd mse package variation: mse16 (12) 16-lead plastic msop ja = 45c/w, jc = 10c/w exposed pad (pin 17) is pgnd and gnd, must be soldered to pcb pin configuration absolute maximum ratings (note 1) parameter conditions min typ max units v in operating voltage range l 4.5 100 v v in quiescent current at shutdown v en/uvlo = 0.2v l 1 2 2 5 a a v en/uvlo = 1.5v l 2.0 3.6 5 9.5 a a v in quiescent current r t = 100k sleep mode (not switching) sync = 0v l 5.5 8.5 15 25 a a active mode (not switching) sync = 0v, bias = 0v l 780 840 1420 1720 a a sync = 0v, bias = 5v l 17 24 40 55 a a sync = int v cc , bias = 0v l 700 800 1080 1170 a a sync = int v cc , bias = 5v l 17 24 40 55 a a electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 12v, en/uvlo = 12v unless otherwise noted. http://www.linear.com/product/LT8331#orderinfo LT8331 8331fa
3 for more information www.linear.com/LT8331 electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 12v, en/uvlo = 12v unless otherwise noted. note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: intv cc cannot be externally driven. no external loading is allowed on this pin. note 3: the LT8331e is guaranteed to meet performance specifications from 0c to 125c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the LT8331i is guaranteed over the full C40c to 125c operating junction temperature range. high junction temperatures degrade operating lifetimes. operating lifetime is derated at junction temperatures greater than 125c. note 4: the ic includes overtemperature protection that is intended to protect the device during overload conditions. junction temperature will exceed 150c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature will reduce lifetime. parameter conditions min typ max units bias threshold rising, bias can supply intv cc falling, bias cannot supply intv cc l l 4.10 3.725 4.4 4 4.65 4.275 v v v in falling threshold to supply intv cc bias = 12v bias C 1.6v v bias falling threshold to supply intv cc v in = 12v v in C 0.4v v fbx regulation fbx regulation voltage fbx > 0v fbx < 0v l l 1.568 C0.820 1.6 C0.80 1.632 C0.780 v v fbx line regulation fbx > 0v, 4.5v < v in < 100v fbx < 0v, 4.5v < v in < 100v 0.005 0.005 0.015 0.015 %/v %/v fbx pin current fbx = 1.6v, C0.8v l C10 10 na oscillator switching frequency (f osc ) r t = 301k r t = 100k r t = 56.2k l l l 92 279 465 100 300 500 107 321 535 khz khz khz minimum on-t ime sync = 0v sync = int v cc 165 160 290 290 ns ns minimum off-t ime 146 230 ns sync/mode, mode thresholds rising to select pulse skipping mode falling to select burst mode operation l l 0.6 2.4 v v sync/mode, clock thresholds rising falling 0.6 2.0 1.1 2.4 v v f sync /f osc allowed ratio r t = 100k 0.95 1 1.25 khz sync pin current sync = 2v C40 40 na switch maximum switch current limit threshold l 0.5 0.6 0.7 a switch overcurrent threshold discharges ss pin 1.15 a switch r ds(on) i sw = 0.25a 1.7 switch leakage current v sw = 140v 0.1 1 a en/uvlo logic en/uvlo pin threshold (rising) start switching l 1.576 1.74 1.90 v en/uvlo pin threshold (falling) stop switching l 1.556 1.6 1.644 v en/uvlo pin current v en/uvlo = 1.6v l C40 40 na soft-start soft-start charge current ss = 1v 2 a soft-start pull-down resistance fault condition, ss = 0.1v 250 LT8331 8331fa
4 for more information www.linear.com/LT8331 typical performance characteristics switching frequency vs temperature switching frequency vs v in normalized switching frequency vs fbx voltage switch current limit vs duty cycle switch minimum on-time vs temperature switch minimum off-time vs temperature fbx positive regulation voltage vs temperature fbx negative regulation voltage vs temperature en/uvlo pin thresholds vs temperature LT8331 8331fa 100 30 40 50 60 70 80 90 100 475 480 125 485 490 495 500 505 510 515 520 525 switching frequency (khz) 150 8331 g05 v in = 12v fbx voltage (v) ?0.8 ?0.4 0.0 0.4 0.8 1.2 1.6 175 0 25 50 75 100 125 normalized switching frequency (%) 8331 g06 v in = 12v duty cycle (%) 1.570 0 20 40 60 80 100 0.50 0.55 0.60 0.65 1.580 0.70 switch current limit (a) 8331 g07 sync = 0v sync = intv cc junction temperature (c) ?50 ?25 0 25 1.590 50 75 100 125 150 175 130 140 150 160 1.600 170 180 190 200 minimum on?time (ns) 8331 g08 junction temperature (c) ?50 ?25 0 1.610 25 50 75 100 125 150 175 110 120 130 1.620 140 150 160 170 180 minimum off?time (ns) 8331 g09 v in = 12v 1.630 fbx voltage (v) 8331 g01 v in = 12v junction temperature (c) ?50 ?25 0 25 50 junction temperature (c) 75 100 125 150 175 ?0.815 ?0.810 ?0.805 ?0.800 ?0.795 ?50 ?0.790 ?0.785 fbx voltage (v) 8331 g02 v in = 12v en/uvlo rising (turn-on) en/uvlo falling (turn-off) junction temperature (c) ?50 ?25 ?25 0 25 50 75 100 125 150 175 1.54 1.57 0 1.60 1.63 1.66 1.69 1.72 1.75 1.78 1.81 1.84 en/uvlo pin voltage (v) 25 8331 g03 v in = 12v junction temperature (c) ?50 ?25 0 25 50 75 100 50 125 150 175 475 480 485 490 495 500 505 75 510 515 520 525 switching frequency (khz) 8331 g04 v in (v) 0 10 20
5 for more information www.linear.com/LT8331 typical performance characteristics switching waveforms (in ccm) switching waveforms (in dcm/light burst mode) switching waveforms (in deep burst mode) burst frequency vs load current v in pin current (sleep mode, not switching) vs temperature v in pin current (active mode, not switching) vs temperature v in pin current (active mode, not switching) vs temperature v out transient response: load current transients from 82.5ma to 165ma to 82.5ma v out transient response: load current transients from 5ma to 165ma to 5ma LT8331 8331fa 50 v sw 50v/div i l1 +i l2 200ma/div 8331 g15 front page application v in = 48v, v out = 48v, i load = 3ma front page application v in = 48v, v out = 48v load current (ma) 75 0 20 40 60 80 100 0 150 300 450 100 600 switching frequency (khz) 8331 g16 front page application v in = 48v, v out = 48v 200s/div v out 500mv/div i load 100ma/div 125 8331 g17 front page application v in = 48v, v out = 48v 500s/div v out 1v/div i load 100ma/div 8331 g18 150 175 0 1.25 2.50 3.75 v in = 12v 5.00 6.25 7.50 8.75 10.00 v in pin current (a) 8331 g10 junction temperature (c) ?50 ?25 v sync/mode = 0v 0 25 50 75 100 125 150 175 600 650 v bias = 0v 700 750 800 850 900 950 1000 v in pin current (a) junction temperature (c) 8331 g11 v in = 12v v sync/mode = 0v v bias = 0v junction temperature (c) ?50 ?25 0 ?50 25 50 75 100 125 150 175 0 5 10 ?25 15 20 25 30 v in pin current (a) 8331 g12 v in 0 = 12v v sync/mode = 0v v bias = 5v 2s/div v sw 50v/div i l1 +i l2 200ma/div 8331 g13 front page application 25 v in = 48v, v out = 48v, i load = 165ma 2s/div v sw 50v/div i l1 +i l2 200ma/div 8331 g14 front page application v in = 48v, v out = 48v, i load = 15ma 5s/div
6 for more information www.linear.com/LT8331 pin functions en/uvlo (pin 1): shutdown and undervoltage detect pin. the LT8331 is shut down when this pin is low and active when this pin is high. below an accurate 1.6v threshold, the part enters undervoltage lockout and stops switching. this allows an undervoltage lockout (uvlo) threshold to be programmed for system input voltage by resistively dividing down system input voltage to the en/uvlo pin. a 140mv pin hysteresis ensures part switching resumes when the pin exceeds 1.74v. en/uvlo pin voltage below 0.2v reduces v in current below 1a. if shutdown and uvlo features are not required, the pin can be tied directly to system input. v in (pin 3) : input supply. this pin must be locally bypassed. be sure to place the positive terminal of the input capaci - tor as close as possible to the v in pin, and the negative terminal as close as possible to the exposed pad pgnd copper (near pin 1). intv cc (pin 5): regulated 3.2v supply for internal loads. the intv cc pin must be bypassed with a minimum 1f low esr ceramic capacitor to gnd. no additional components or loading is allowed on this pin. intv cc draws power from the bias pin if 4.4v bias v in C 0.4v , otherwise intv cc is powered by the v in pin. nc (pins 6, 8): no internal connection. leave these pins open. bias (pin 7): second input supply for powering intv cc . removes the majority of intv cc current from the v in pin to improve efficiency when 4.4v bias v in C 0.4v. if unused, tie the pin to gnd copper. fbx (pin 9): voltage regulation feedback pin for positive or negative outputs. connect this pin to a resistor divider between the output and the exposed pad gnd copper (near pin 9). fbx reduces the switching frequency during start- up and fault conditions when fbx is close to 0v. rt (pin 10) : a resistor from this pin to the exposed pad gnd copper (near pin 9) programs switching frequency. ss (pin 11): soft-start pin. connect a capacitor from this pin to gnd copper (near pin 9) to control the ramp rate of inductor current during converter start-up. ss pin charging current is 2a. an internal 250 mosfet discharges this pin during shutdown or fault conditions. sync/mode (pin 12): this pin allows three selectable modes for optimization of performance. 1. gnd : for burst mode operation (low i q and low output voltage ripple at light loads). 2. external clock : for synchronized switching frequency . 3. int v cc : for pulse-skipping mode (at light load or low duty cycle). sw1, sw2 (pins 14, 16): outputs of the internal power switch. minimize the metal trace area connected to these pins to reduce emi. pgnd,gnd (pin 17): power ground and signal ground for the ic. the package has an exposed pad (pin? 17) underneath the ic which is the best path for heat out of the package. pin 17 should be soldered to a continuous copper ground plane under the device to reduce die tem - perature and increase the power capability of the LT8331. connect power ground components to the exposed pad copper exiting near pins 1, 14 and 16. connect signal ground components to the exposed pad copper exiting near pins 8 and 9. LT8331 8331fa
7 for more information www.linear.com/LT8331 block diagram 8331 bd vc ? + ? + a7 ? + ? + a6 ? + ? + ? + a2 ? + r4 opt v bias + 0.4v(+) v bias ? 1.6v(?) 4.4v(+) 4.0v(?) 3.2v regulator sw1 oscillator a6 error amp select frequency foldback intv cc uvlo switch logic burst detect slope driver m1 intv cc t j > 170c 1.74v(+) 1.6v(?) internal reference uvlo c in sw2 bias r3 opt v in c out c vcc d1 l1 v out uvlo rt sync/mode over- current a7 overcurrent ? + a1 pgnd/gnd error amp error amp slope 1.6v fbx v out r2 r1 ?0.8v max i limit 1.9 max i limit r sense pwm comparator q1 r5 a3 a5 i ss 2a m2 ss c ss en/uvlo v in uvlo a4 LT8331 8331fa c1 l2
8 for more information www.linear.com/LT8331 operation the LT8331 uses a fixed frequency, current mode control scheme to provide excellent line and load regulation. operation can be best understood by referring to the block diagram. an oscillator (with frequency programmed by a resistor at the rt pin) turns on the internal power switch at the beginning of each clock cycle. current in the inductor then increases until the current comparator trips and turns off the power switch. the peak inductor current at which the switch turns off is controlled by the voltage on the internal vc node. the error amplifier servos the vc node by comparing the voltage on the fbx pin with an internal reference voltage (1.60v or C 0.80v , depending on the chosen topology). when the load current increases it causes a reduction in the fbx pin voltage relative to the internal reference. this causes the error amplifier to increase the vc voltage until the new load current is satisfied. in this manner, the error amplifier sets the correct peak switch current level to keep the output in regulation. the LT8331 is capable of generating either a positive or negative output voltage with a single fbx pin. it can be configured as a boost, sepic or flyback converter to gener - ate a positive output voltage, or as an inverting converter to generate a negative output voltage. when configured as a sepic converter , as shown in the block diagram, the fbx pin is pulled up to the internal bias voltage of 1.60v by a voltage divider (r1 and r2) connected from v out to gnd. amplifier a2 becomes inactive and amplifier a1 performs (inverting) amplification from fbx to vc. when the LT8331 is in an inverting configuration, the fbx pin is pulled down to C0.80v by a voltage divider from v out to gnd. amplifier a1 becomes inactive and amplifier a2 performs (non-inverting) amplification from fbx to vc. if the en/uvlo pin voltage is below 1.6v, the LT8331 enters undervoltage lockout (uvlo), and stops switching. when the en/uvlo pin voltage is above 1.74v (typical), the LT8331 resumes switching. if the en/uvlo pin voltage is below 0.2v, the LT8331 draws less than 1a from v in . for the sync/mode pin tied to ground, the LT8331 pro - vides low output ripple burst mode operation with ultra low quiescent current at light loads. for the sync/mode pin tied to intv cc , the LT8331 uses pulse-skipping mode, at the expense of hundreds of microamps, to maintain output voltage regulation at light loads by skipping switch pulses. for the sync/mode pin driven by an external clock, the converter switching frequency is synchronized to that clock and pulse-skipping mode is also enabled. the LT8331 includes a bias pin to improve efficiency across all loads. the intv cc supply current can be drawn from the bias pin instead of the v in pin for 4.4v bias v in . protection features ensure the immediate disable of switching and reset of the ss pin for any of the following faults: internal reference uvlo, intv cc uvlo, switch cur - rent > 1.9 maximum limit, en/uvlo < 1.6v or junction temperature > 170c. LT8331 8331fa
9 for more information www.linear.com/LT8331 applications information figure 1. burst frequency vs load current achieving ultralow quiescent current to enhance efficiency at light loads the LT8331 uses a low ripple burst mode architecture. this keeps the output capacitor charged to the desired output voltage while minimizing the input quiescent current and output ripple. in burst mode operation, the LT8331 delivers single small pulses of current to the output capacitor followed by sleep periods where the output power is supplied by the output capacitor. while in sleep mode, the LT8331 consumes only 6a. as the output load decreases, the frequency of single cur - rent pulses decreases (see figure 1) and the percentage of time the LT8331 is in sleep mode increases, resulting in much higher light load efficiency than for typical convert - ers. to optimize the quiescent current performance at light loads, the current in the feedback resistor divider must be minimized as it appears to the output as load current. in ad - dition, all possible leakage currents from the output should also be minimized as they all add to the equivalent output load. the largest contributor to leakage current can be due to the reverse biased leakage of the schottky diode (see diode selection in the applications information section). while in burst mode operation, the current limit of the switch is approximately 140ma resulting in the output voltage ripple shown in figure 2. increasing the output capacitance will decrease the output ripple proportionally. as the output load ramps upward from zero the switching frequency will increase but only up to the fixed frequency defined by the resistor at the rt pin as shown in figure?1. the output load at which the LT8331 reaches the fixed figure 2. burst mode operation frequency varies based on input voltage, output voltage, and inductor choice. programming input turn-on and turn-off thresholds with en/uvlo pin the en/uvlo pin voltage controls whether the LT8331 is enabled or is in a shutdown state. a 1.6v reference and a comparator a6 with built-in hysteresis (typical 140mv) allow the user to accurately program the system input voltage at which the ic turns on and off (see the block diagram). the typical input falling and rising threshold voltages can be calculated by the following equations: v in(falling,uvlo(C )) = 1.60 ? r3 + r4 r4 v in(rising, uvlo(+)) = 1.74 ? r3 + r4 r4 v in current is reduced below 1a when the en/uvlo pin voltage is less than 0.2v. the en/uvlo pin can be con - nected directly to the input supply v in for always-enabled operation. a logic input can also control the en/uvlo pin. when operating in burst mode operation for light load currents, the current through the r3 and r4 network can easily be greater than the supply current consumed by the LT8331. therefore, r3 and r4 should be large enough to minimize their effect on efficiency at light loads. intv cc regulator a low dropout (ldo) linear regulator, supplied from v in , produces a 3.2v supply at the intv cc pin. a minimum 1f low esr ceramic capacitor must be used to bypass the intv cc pin to ground to supply the high transient cur - rents required by the internal power mosfet gate driver. LT8331 8331fa 100 0 150 300 450 600 switching frequency (khz) 8331 f01 5s/div v out front page application 20mv/div i l1 +i l2 100ma/div 8331 f02 v in = 48v, v out = 48v load current (ma) 0 20 40 60 80
10 for more information www.linear.com/LT8331 applications information no additional components or loading is allowed on this pin. the intv cc rising threshold (to allow soft-start and switching) is typically 2.6v . the intv cc falling threshold (to stop switching and reset soft-start) is typically 2.5v . to improve efficiency across all loads, the majority of intv cc current can be drawn from the bias pin ( 4.4v bias v in C 0.4v ) instead of the v in pin. for flyback or sepic applications with v in often greater than v out , the bias pin can be directly connected to v out . if the bias pin is connected to a supply other than v out , be sure to bypass the pin with a local ceramic capacitor. programming switching frequency the LT8331 uses a constant frequency pwm architecture that can be programmed to switch from 100khz to 500khz by using a resistor tied from the rt pin to ground. a table showing the necessary r t value for a desired switching frequency is in table 1. the r t resistor required for a desired switching frequency can be calculated using: r t = 32.85 f sw C 9.5 where r t is in k and f sw is the desired switching fre- quency in mhz. table 1. sw frequency vs r t value f sw (mhz) r t (k) 0.1 324 0.2 154 0.3 100 0.4 73.2 0.45 63.4 0.5 56.2 synchronization and mode selection to select low ripple burst mode operation, tie the sync/ mode pin below 0.6v (this can be ground or a logic low output). to synchronize the LT8331 oscillator to an exter - nal frequency connect a square wave (with 20% to 80% duty cycle) to the sync pin. the square wave amplitude should have valleys that are below 0.6v and peaks above 2.4v (up to 6v). the LT8331 will not enter burst mode operation at low output loads while synchronized to an external clock, but instead will pulse skip to maintain regulation. the LT8331 may be synchronized over a 100khz to 625khz range. the r t resistor should be chosen to set the LT8331 switching frequency equal to or below the lowest synchronization input. for example, if the synchronization signal will be 500khz and higher, the r t should be selected for 500khz. for some applications it is desirable for the LT8331 to operate in pulse-skipping mode, offering two major differ - ences from burst mode operation. firstly, the clock stays awake at all times and all switching cycles are aligned to the clock. secondly, the full switching frequency is reached at lower output load than in burst mode operation. these two differences come at the expense of increased quiescent current. to enable pulse-skipping mode, tie the sync pin above 2.4v (this can be intv cc or a logic high output). duty cycle consideration the LT8331 minimum on-time, minimum off-time and switching frequency (f osc ) define the allowable minimum and maximum duty cycles of the converter (see minimum on-time, minimum off-time, and switching frequency in the electrical characteristics table). minimum allowable duty cycle = minimum on-time (max) ? f osc(max) maximum allowable duty cycle = 1 C minimum off-time (max) ? f osc(max) the required switch duty cycle range for a boost converter operating in continuous conduction mode (ccm) can be calculated as: d min = 1 C v in(max) (v out + v d ) d max = 1 C v in(min) (v out + v d ) where v d is the diode forward voltage drop. if the above duty cycle calculations for a given application violate LT8331 8331fa
11 for more information www.linear.com/LT8331 the minimum and/or maximum allowed duty cycles for the LT8331, operation in discontinuous conduction mode?(dcm) might provide a solution. for the same v in and v out levels, operation in dcm does not demand as low a duty cycle as in ccm. dcm also allows higher duty cycle operation than ccm. the additional advantage of dcm is the removal of the limitations to inductor value and duty cycle required to avoid sub-harmonic oscillations and the right half plane zero (rhpz). while dcm provides these benefits, the trade-off is higher inductor peak cur - rent, lower available output power and reduced efficiency. set ting the output vol tage the output voltage is programmed with a resistor divider from the output to the fbx pin. choose the resistor values for a positive output voltage according to: r1 = r2 ? v out 1.60v C 1 ? ? ? ? ? ? ? ? choose the resistor values for a negative output voltage according to: r1 = r2 ? |v out | 0.80v C 1 ? ? ? ? ? ? ? ? the locations of r1 and r2 are shown in the block dia - gram. 1% resistors are recommended to maintain output voltage accuracy . higher -value fbx divider resistors result in the lowest input quiescent current and highest light-load efficiency. fbx divider resistors r1 and r2 are usually in the range from 25k to 1m. soft-start the LT8331 contains several features to limit peak switch currents and output voltage (v out ) overshoot during start-up or recovery from a fault condition. the primary purpose of these features is to prevent damage to external components or the load. high peak switch currents during start-up may occur in switching regulators. since v out is far from its final value, the feedback loop is saturated and the regulator tries to charge the output capacitor as quickly as possible, resulting in large peak currents. a large surge current may cause inductor saturation or power switch failure. the LT8331 addresses this mechanism with a program - mable soft-start function. as shown in the block diagram, t h e soft-start function controls the ramp of the power switch current by controlling the ramp of vc through q1 . this allows the output capacitor to be charged gradually toward its final value while limiting the start-up peak currents. figure 3 shows the output voltage and supply current for the first page t ypical application. it can be seen that both the output voltage and supply current come up gradually . figure 3. soft-start waveforms fault protection an inductor overcurrent fault ( > 1.15a ) and/or intv cc undervoltage (intv cc < 2.5v ) and/or thermal lockout (t j ? >? 170c ) will immediately prevent switching, will reset the ss?pin and will pull down vc. once all faults are removed, the LT8331 will soft-start vc and hence induc - tor peak current. frequency foldback during start-up or fault conditions in which v out is very low, extremely small duty cycles may be required to maintain control of inductor peak current. the minimum on-time limitation of the power switch might prevent these low duty cycles from being achievable. in this scenario inductor current rise will exceed inductor current fall during each cycle, causing inductor current to walk up beyond the switch current limit. the LT8331 provides protection from this by folding back switching frequency whenever fbx pin applications information LT8331 8331fa 2ms/div v out 20v/div i l1 +i l2 100ma/div 8331 f03
12 for more information www.linear.com/LT8331 applications information is close to gnd (low v out levels). this frequency foldback provides a larger switch-off time, allowing inductor cur - rent to fall enough each cycle (see normalized switching frequency vs fbx voltage in the typical performance characteristics section). thermal lockout if the LT8331 die temperature reaches 170c (typical), the part will stop switching and go into thermal lockout. when the die temperature has dropped by 5c (nominal), the part will resume switching with a soft-started inductor peak current. compensation the LT8331 is internally compensated. the decision to use either low esr (ceramic) capacitors or the higher esr (tantalum or os-con) capacitors, for the output capacitor, can affect the stability of the overall system. the esr of any capacitor, along with the capacitance itself, contrib - utes a zero to the system. for the tantalum and os-con capacitors, this zero is located at a lower frequency due to the higher value of the esr, while the zero of a ceramic capacitor is at a much higher frequency and can generally be ignored. a phase lead zero can be intentionally introduced by placing a capacitor in parallel with the resistor between v out and fbx. by choosing the appropriate values for the resistor and capacitor, the zero frequency can be designed to improve the phase margin of the overall converter. the typical target value for the zero frequency is between 5khz to 20khz. a practical approach to compensation is to start with one of the circuits in this data sheet that is similar to your ap - plication. optimize performance by adjusting the output capacitor and/or the feed for ward capacitor (connected across the feedback resistor from output to fbx pin). thermal considera tions care should be taken in the layout of the pcb to ensure good heat sinking of the LT8331. the package has an exposed pad (pin 17) underneath the ic which is the best path for heat out of the package. pin 17 should be soldered to a continuous copper ground plane under the device to reduce die temperature and increase the power capability of the LT8331. the ground plane should be connected to large copper layers to spread heat dissipated by the LT8331. power dissipation within the LT8331 (p diss_LT8331 ) can be estimated by subtracting the inductor and schottky diode power losses from the total power losses calculated in an efficiency measurement. the junction temperature of LT8331 can then be estimated by: t j (LT8331) = t a + j a ? p diss_LT8331 application circuits the LT8331 can be configured for different topologies. the first topology to be analyzed will be the boost converter, followed by the flyback, sepic and inverting converters. boost converter: switch duty cycle the LT8331 can be configured as a boost converter for the applications where the converter output voltage is higher than the input voltage. remember that boost con - verters are not short-circuit protected. under a shorted output condition, the inductor current is limited only by the input supply capability . for applications requiring a step-up converter that is short-circuit protected, please refer to the applications information section covering sepic converters. the conversion ratio as a function of duty cycle is: v out v in = 1 1 ? d in continuous conduction mode (ccm). for a boost converter operating in ccm, the duty cycle of the main switch can be calculated based on the output voltage (v out ) and the input voltage (v in ). the maximum duty cycle (d max ) occurs when the converter has the minimum input voltage: d max = v out ? v in(min) v out LT8331 8331fa
13 for more information www.linear.com/LT8331 applications information discontinuous conduction mode (dcm) provides higher conversion ratios at a given frequency at the cost of re - duced efficiencies, higher switching currents, and lower available output power . boost converter: maximum output current capability and inductor selection for the boost topology , the maximum average inductor current is: i l(max )(ave) = i o(max ) ? 1 1 ? d max ? 1 where (< 1.0) is the converter efficiency. due to the current limit of its internal power switch, the LT8331 should be used in a boost converter whose maxi - mum output current (i o(max) ) is: i o(max ) v in(min) v out ? 0.5a ? 0.5 ? ? i sw ( ) ? minimum possible inductor value and switching frequency should also be considered since they will increase inductor ripple current ?i sw . the inductor ripple current ?i sw has a direct effect on the choice of the inductor value and the converters maximum output current capability. choosing smaller values of ?i sw increases output current capability, but requires large inductances and reduces the current loop gain (the converter will approach voltage mode). accepting larger values of ?i sw provides fast transient response and allows the use of low inductances, but results in higher input current ripple and greater core losses, and reduces output current capability. it is recommended to choose a ?i sw of approximately 0.2a to 0.3a. given an operating input voltage range, and having chosen the operating frequency and ripple current in the inductor, the inductor value of the boost converter can be determined using the following equation: l = v in(min) ? i sw ? f osc ? d max the peak inductor current is the switch current limit (maximum 0.7a ), and the rms inductor current is ap- proximately equal to i l(max)(ave) . choose an inductor that can handle at least 0.7a without saturating, and ensure that the inductor has a low dcr (copper-wire resistance) to minimize i 2 r power losses. note that in some applications, the current handling re - quirements of the inductor can be lower, such as in the sepic topology where each inductor only carries one-half of the total switch current. for better efficiency , use similar valued inductors with a larger volume. many different sizes and shapes are available from various manufacturers (see table 2). choose a core material that has low losses at the programmed switching frequency, such as a ferrite core. the final value chosen for the inductor should not allow peak inductor currents to exceed 0.5a in steady state at maximum load. due to tolerances, be sure to account for minimum possible inductance value, switching frequency and converter efficiency. table 2. inductor manufacturers sumida (847) 956-0666 www.sumida.com tdk (847) 803-6100 www.tdk.com murata (714) 852-2001 www.murata.com coilcraft (847) 639-6400 www.coilcraft.com wurth (605) 886-4385 www.we-online.com boost converter: input capacitor selection bypass the input of the LT8331 circuit with a ceramic ca - pacitor of x7r or x5r type placed as close as possible to the v in and gnd pins. y5v types have poor performance over temperature and applied voltage, and should not be used. a 4.7f to 10f ceramic capacitor is adequate to bypass the LT8331 and will easily handle the ripple cur - rent. if the input power source has high impedance, or there is significant inductance due to long wires or cables, additional bulk capacitance may be necessar y . this can be provided with a low performance electrolytic capacitor. a precaution regarding the ceramic input capacitor con - cerns the maximum input voltage rating of the LT8331. a ceramic input capacitor combined with trace or cable LT8331 8331fa
14 for more information www.linear.com/LT8331 inductance forms a high quality (under damped) tank cir - cuit. if the LT8331 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT8331 s voltage rating. this situation is easily avoided (see application note 88). boost converter: output capacitor selection low esr (equivalent series resistance) capacitors should be used at the output to minimize the output ripple voltage. multilayer ceramic capacitors are an excellent choice, as they are small and have extremely low esr. use x5r or x7r types. this choice will provide low output ripple and good transient response. a 10f to 47f output capacitor is sufficient for most applications, but systems with very low output currents may need only a 1f or 2.2f output capacitor. solid tantalum or os-con capacitor can be used, but they will occupy more board area than a ceramic and will have a higher esr. always use a capacitor with a sufficient voltage rating. contributions of esr (equivalent series resistance), esl (equivalent series inductance) and the bulk capacitance must be considered when choosing the correct output capacitors for a given output ripple voltage. the effect of these three parameters (esr, esl and bulk c) on the output voltage ripple waveform for a typical boost converter is illustrated in figure 4. between ?v esr and ?v cout . this percentage ripple will change, depending on the requirements of the application, and the following equations can easily be modified. for a 1% contribution to the total ripple voltage, the esr of the output capacitor can be determined using the following equation: esr cout 0.01 ? v out i d(peak ) for the bulk c component, which also contributes 1% to the total ripple: c out i o(max ) 0.01 ? v out ? f osc the output capacitor in a boost regulator experiences high rms ripple currents, as shown in figure 4. the rms ripple current rating of the output capacitor can be determined using the following equation: i rms(cout) i o(max ) ? d max 1 ? d max multiple capacitors are often paralleled to meet esr requirements. typically, once the esr requirement is satisfied, the capacitance is adequate for filtering and has the required rms current rating. additional ceramic capaci - tors in parallel are commonly used to reduce the effect of p a rasitic inductance in the output capacitor, which reduces high frequency switching noise on the converter output. ceramic capacitors ceramic capacitors are small, robust and have very low esr. however, ceramic capacitors can cause problems when used with the LT8331 due to their piezoelectric nature. when in burst mode operation, the LT8331s switching frequency depends on the load current, and at very light loads the LT8331 can excite the ceramic capacitor at audio frequencies, generating audible noise. since the LT8331 operates at a lower current limit during burst mode op - eration, the noise is typically very quiet to a casual ear. if this is unacceptable, use a high performance tantalum figure 4. the output ripple waveform of a boost converter v out (ac) t on ?v esr ringing due to total inductance (board + cap) ?v cout 8331 f04 t off the choice of component(s) begins with the maximum acceptable ripple voltage (expressed as a percentage of the output voltage), and how this ripple should be divided between the esr step ?v esr and the charging/discharg - ing ? v cout . for the purpose of simplicity, we will choose 2% for the maximum output ripple, to be divided equally applications information LT8331 8331fa
15 for more information www.linear.com/LT8331 or electrolytic capacitor at the output. low noise ceramic capacitors are also available. table 3. ceramic capacitor manufacturers taiyo yuden (408) 573-4150 www.t-yuden.com avx (803) 448-9411 www.avxcorp.com murata (714) 852-2001 www.murata.com boost converter: diode selection a schottky diode is recommended for use with the LT8331. low leakage schottky diodes are necessary when low quiescent current is desired at low loads. the diode leakage appears as an equivalent load at the output and should be minimized. choose schottky diodes with sufficient reverse voltage ratings for the target applications. table 4. recommended schottky diodes part number average forward current (ma) reverse voltage (v) reverse current (a) manufacturer dfls1100 1000 100 1.0 diodes, inc. rb558va150tr 500 150 0.5 rohm rb068l150te25 2000 150 3.0 rohm rf101l2ste25 1000 200 10 rohm bav21w 200 200 0.1 vishay applications information figure 5. suggested boost converter layout boost converter: layout hints the high speed operation of the LT8331 demands careful attention to board layout. careless layout will result in per - formance degradation. figure 5 shows the recommended component placement for a boost converter. note the vias under the exposed pad. these should connect to a local ground plane for better thermal per formance. flyback converter applications the LT8331 can be configured as a flyback converter for the applications where the converters have multiple outputs, high output voltages or isolated outputs. figure?6 shows a simplified flyback converter. the flyback converter has a very low parts count for mul - tiple outputs, and with prudent selection of turns ratio, can have high output/input voltage conversion ratios with a desirable duty cycle. however, it has low efficiency due to the high peak currents, high peak voltages and consequent power loss. the flyback converter can be designed to operate either in continuous or discontinuous mode. compared to con - tinuous mode, discontinuous mode has the advantage of 1 3 5 6 7 8 en v in intv cc nc bias nc 16 14 12 11 10 9 sw1 sw2 sync ss rt fbx pgnd gnd v out sw v out pgnd v in sw 8331 f05 LT8331 8331fa
16 for more information www.linear.com/LT8331 applications information figure 7. waveforms of the flyback converter in discontinuous mode operation 8331 f07 i sw v sw i d t dt s d2t s d3t s i d(max) t s smaller transformer inductances and easy loop compen- sation, and the disadvantage of higher peak-to-average current and lower efficiency . flyback converter: switch duty cycle and t urns ratio the flyback converter conversion ratio in the continuous mode operation is: v out v in = n s n p ? d 1 ? d where n s /n p is the second to primary turns ratio. d is duty cycle. figure 7 shows the waveforms of the flyback converter in discontinuous mode operation. during each switching period t s , three subintervals occur : dt s , d2t s , d3t s . during dt s , m is on, and d is reverse-biased. during d2t s , m is off, and l s is conducting current. both l p and l s currents are zero during d3t s . the flyback converter conversion ratio in the discontinu - ous mode operation is: v out v in = n s n p ? d d2 according to figure 6, the peak sw voltage is: v sw(peak) = v in(max) + v sn where v sn is the snubber capacitor voltage. a smaller v sn results in a larger snubber loss. a reasonable v sn is 1.5 to 2 times of the reflected output voltage: v sn = k ? v out ? n p n s k = 1.5 ~ 2 according to the absolute maximum ratings table, the sw voltage absolute maximum value is 140v. therefore, the maximum primary to secondary turns ratio (for both the continuous and the discontinuous operation) should be: n p n s 140v ? v in(max ) k ? v out according to the preceding equations, the user has relative freedom in selecting the switch duty cycle or turns ratio to suit a given application. the selections of the duty cycle and the turns ratio are somewhat iterative processes, due to the number of variables involved. the user can choose either a duty cycle or a turns ratio as the start point. the following trade-offs should be considered when select - ing the switch duty cycle or turns ratio, to optimize the figure 6. a simplified flyback converter n p :n s v in c in c sn v sn l p d suggested rcd snubber i d i sw 8331 f06 gnd sw LT8331 l s + ? r sn d sn + ? + v out c out + LT8331 8331fa
17 for more information www.linear.com/LT8331 applications information converter performance. a higher duty cycle affects the flyback converter in the following aspects: n lower switch rms current i sw(rms) , but higher switch v sw peak voltage n lower diode peak reverse voltage, but higher diode rms current i d(rms) n higher transformer turns ratio (n p /n s ) it is recommended to choose a duty cycle between 20% and 80%. flyback converter: maximum output current capability and transformer design the maximum output current capability and transformer design for continuous conduction mode (ccm) is chosen as presented here. the maximum duty cycle (d max ) occurs when the converter has the minimum v in : d max = v out n p n s ? ? ? ? ? ? ? ? ? ? v out n p n s ? ? ? ? ? ? ? ? ? ? + v in(min) due to the current limit of its internal power switch, the LT8331 should be used in a flyback converter whose maximum output current (i o(max) ) is: i o(max ) v in(min) v out ? d max ? 0.5a ? 0.5 ? ? i sw ( ) ? where (< 1.0) is the converter efficiency. minimum possible inductor value and switching frequency should also be considered since they will increase inductor ripple current ?i sw . the transformer ripple current ?i sw has a direct effect on the design/choice of the transformer and the converters output current capability. choosing smaller values of ?i sw increases the output current capability, but requires large primary and secondary inductances and reduces the cur - rent loop gain (the converter will approach voltage mode). accepting larger values of ?i sw allows the use of low primary and secondary inductances, but results in higher input current ripple, greater core losses, and reduces the output current capability. it is recommended to choose a ?i sw of approximately 0.2a to 0.3a. given an operating input voltage range, and having chosen the operating frequency and ripple current in the primary winding, the primary winding inductance can be calculated using the following equation: l = v in(min) ? i sw ? f osc ? d max the primary winding peak current is the switch current limit (maximum 0.7a ). the primary and secondary maximum rms currents are: i lp(rms) p out(max ) d max ? v in(min) ? i ls(rms) i out(max ) 1 ? d max based on the preceding equations, the user should design/ choose the transformer having sufficient saturation and rms current ratings. flyback converter: snubber design transformer leakage inductance (on either the primary or secondary) causes a voltage spike to occur after the mos - fet turn-off. this is increasingly prominent at higher load currents, where more stored energy must be dissipated. in some cases a snubber circuit will be required to avoid over voltage breakdown at the mosfet s drain node. there are different snubber circuits (such as rc snubber, rcd snubber, etc.) and application note 19 is a good reference on snubber design. an rcd snubber is shown in figure 6. the snubber resistor value (r sn ) can be calculated by the following equation: r sn = 2 ? v 2 sn ? v sn ? v out ? n p n s i 2 sw(peak ) ? l lk ? f osc LT8331 8331fa
18 for more information www.linear.com/LT8331 l lk is the leakage inductance of the primary winding, w hich is usually specified in the transformer characteristics. l lk can be obtained by measuring the primary inductance with the secondary windings shorted. the snubber capacitor value (c sn ) can be determined using the following equation: c sn = v sn ? v sn ? r sn ? f osc where ?v sn is the voltage ripple across c sn . a reasonable ?v sn is 5% to 10% of v sn . the reverse voltage rating of d sn should be higher than the sum of v sn and v in(max) . flyback converter: output diode selection the output diode in a flyback converter is subject to large rms current and peak reverse voltage stresses. a fast switching diode with a low forward drop and a low reverse leakage is desired. schottky diodes are recommended if the output voltage is below 100v. approximate the required peak repetitive reverse voltage rating v rrm using: v rrm > n s n p ? v in(max ) + v out the power dissipated by the diode is: p d = i o(max) ? v d and the diode junction temperature is: t j = t a + p d ? r j a the r ja to be used in this equation normally includes the r jc for the device, plus the thermal resistance from the board to the ambient temperature in the enclosure. t j must not exceed the diode maximum junction temperature rating. flyback converter: output capacitor selection the output capacitor of the flyback converter has a similar operation condition as that of the boost converter. refer to the boost converter: output capacitor selection section for the calculation of c out and esr cout . the rms ripple current rating of the output capacitors in continuous operation can be determined using the following equation: i rms(cout),continuous i o(max ) ? d max 1 ? d max flyback converter: input capacitor selection the input capacitor in a flyback converter is subject to a large rms current due to the discontinuous primary current. to prevent large voltage transients, use a low esr input capacitor sized for the maximum rms current. the rms ripple current rating of the input capacitors in continuous operation can be determined using the following equation: i rms(cin),continuous p out(max ) v in(min) ? ? 1 ? d max d max sepic converter applications the LT8331 can be configured as a sepic (single-ended primary inductance converter), as shown in figure 8. this topology allows for the input to be higher, equal, or lower than the desired output voltage. the conversion ratio as a function of duty cycle is: v out + v d v in = d 1 ? d in continuous conduction mode (ccm). applications information figure 8. LT8331 configured in a sepic topology LT8331 8331fa LT8331 v in v cc int d1 c in c out c dc 8331 f08 l1 l2 v out v in sw fbx gnd en/uvlo
19 for more information www.linear.com/LT8331 applications information in a sepic converter, no dc path exists between the input and output. this is an advantage over the boost converter for applications requiring the output to be disconnected from the input source when the cir cuit is in shutdown. sepic converter: switch duty cycle and frequency for a sepic converter operating in ccm, the duty cycle of the main switch can be calculated based on the output voltage (v out ), the input voltage (v in ) and the diode forward voltage (v d ). the maximum duty cycle (d max ) occurs when the converter operates at the minimum input voltage: d max = v out + v d v in(min) + v out + v d conversely, the minimum duty cycle (d min ) occurs when the converter operates at the maximum input voltage: d min = v out + v d v in(max) + v out + v d be sure to check that d max and d min obey: d max < 1 C minimum off-time (max) ? f osc(max) and d min > minimum on-time (max) ? f osc(max) where minimum off-time, minimum on-time and f osc are specified in the electrical characteristics table. sepic converter: the maximum output current capability and inductor selection as shown in figure 8, the sepic converter contains two inductors : l1 and l2. l1 and l2 can be independent, but can also be wound on the same core, since identical voltages are applied to l1 and l2 throughout the switching cycle. for the sepic topology, the current through l1 is the converter input current. based on the fact that, ideally, the output power is equal to the input power, the maximum average inductor currents of l1 and l2 are: i l1(max)(ave) = i in(max)(ave) = i o(max) ? d max 1 ? d max i l2(max)(ave) = i o(max) in a sepic converter, the switch current is equal to i l1 + i l2 when the power switch is on, therefore, the maximum average switch current is defined as: i sw(max)(ave) = i l1(max)(ave) + i l2(max)(ave) = i o(max) ? 1 1 ? d max and the peak switch current is: i sw(peak) = 1 + c 2 ? ? ? ? ? ? ? ? ? i o(max) ? 1 1 ? d max the constant c in the preceding equations represents the percentage peak-to-peak ripple current in the switch, relative to i sw(max)(ave) , as shown in figure 9. then, the switch ripple current ?i sw can be calculated by: ?i sw = c ? i sw(max)(ave) the inductor ripple currents ?i l1 and ?i l2 are identical: ?i l1 = ?i l2 = 0.5 ? ?i sw figure 9. the switch current waveform of the sepic converter 8331 f09 ?i sw = ? i sw(max)(ave) i sw t dt s i sw(max)(ave) t s LT8331 8331fa
20 for more information www.linear.com/LT8331 the inductor ripple current has a direct effect on the choice of the inductor value. choosing smaller values of ?i l requires large inductances and reduces the current loop gain (the converter will approach voltage mode). accepting larger values of ?i l allows the use of low in - ductances, but results in higher input current ripple and greater core losses. it is recommended that c falls in the range of 0.5 to 0.8. due to the current limit of its internal power switch, the LT8331 should be used in a sepic converter whose maximum output current (i o(max) ) is: i o(max) < (1 C d max ) ? (0.5a C 0.5 ? ?i sw ) ? where (< 1.0) is the converter efficiency. minimum possible inductor value and switching frequency should also be considered since they will increase inductor ripple current ?i sw . given an operating input voltage range, and having cho - sen ripple current in the inductor, the inductor value ( l1 and l2 are independent) of the sepic converter can be determined using the following equation: l1 = l2 = v in(min) 0.5 ? ? i sw ? f osc ? d max for most sepic applications, the equal inductor values will fall in the range of 4.7h to 220h. by making l1 = l2 , and winding them on the same core, the value of inductance in the preceding equation is replaced by 2l, due to mutual inductance: l = v in(min) ? i sw ? f osc ? d max this maintains the same ripple current and energy storage in the inductors. the peak inductor currents are: i l1(peak) = i l1(max) + 0.5 ? ?i l1 i l2(peak) = i l2(max) + 0.5 ? ?i l2 the maximum rms inductor currents are approximately equal to the maximum average inductor currents. based on the preceding equations, the user should choose the inductors having sufficient saturation and rms cur - rent ratings. sepic converter : output diode selection t o maximize efficiency, a fast switching diode with a low forward drop and low reverse leakage is desirable. the average forward current in normal operation is equal to the output current. it is recommended that the peak repetitive reverse voltage rating v rrm is higher than v out + v in(max) by a safety margin (a 10v safety margin is usually sufficient). the power dissipated by the diode is: p d = i o(max) ? v d where v d is diode s forward voltage drop, and the diode junction temperature is: t j = t a + p d ? r j a the r ja used in this equation normally includes the r jc for the device, plus the thermal resistance from the board, to the ambient temperature in the enclosure. t j must not exceed the diode maximum junction temperature rating. sepic converter: output and input capacitor selection the selections of the output and input capacitors of the sepic converter are similar to those of the boost converter. sepic converter: selecting the dc coupling capacitor the dc voltage rating of the dc coupling capacitor (c dc , as shown in figure 10) should be larger than the maximum input voltage: v cdc > v in(max) applications information LT8331 8331fa
21 for more information www.linear.com/LT8331 c dc has nearly a rectangular current waveform. during the switch off-time, the current through c dc is i in , while approximately Ci o flows during the on-time. the rms rating of the coupling capacitor is determined by the fol- lowing equation: i rms(cdc) > i o(max) ? v out + v d v in(min) a low esr and esl, x5r or x7r ceramic capacitor works well for c dc . inverting converter applications the LT8331 can be configured as a dual-inductor inverting topology, as shown in figure 10. the v out to v in ratio is : v out ? v d v in = ? d 1 ? d in continuous conduction mode (ccm). conversely, the minimum duty cycle (d min ) occurs when the converter operates at the maximum input voltage : d min = v out ? v d v out ? v d ? v in(max) be sure to check that d max and d min obey : d max < 1 C minimum off-time (max) ? f osc(max) and d min > minimum on-time (max) ? f osc(max) where minimum off-time, minimum on-time and f osc are specified in the electrical characteristics table. inverting converter: inductor, output diode and input capacitor selections the selections of the inductor, output diode and input capacitor of an inverting converter are similar to those of the sepic converter. please refer to the corresponding sepic converter sections. inverting converter: output capacitor selection the inverting converter requires much smaller output capacitors than those of the boost, flyback and sepic converters for similar output ripples. this is due to the fact that, in the inverting converter, the inductor l2 is in series with the output, and the ripple current flowing through the output capacitors are continuous. the output ripple voltage is produced by the ripple current of l2 flowing through the esr and bulk capacitance of the output capacitor: ? v out(p C p) = ? i l2 ? esr cout + 1 8 ? f osc ? c out ? ? ? ? ? ? ? ? ? ? after specifying the maximum output ripple, the user can select the output capacitors according to the preceding equation. figure 10. a simplified inverting converter c dc v in c in l1 d1 c out v out 8331 f10 + gnd LT8331 sw l2 + ? + ? + applications information inverting converter: switch duty cycle and frequency for an inverting converter operating in ccm, the duty cycle of the main switch can be calculated based on the negative output voltage (v out ) and the input voltage (v in ). the maximum duty cycle (d max ) occurs when the converter has the minimum input voltage: d max = v out ? v d v out ? v d ? v in(min) LT8331 8331fa
22 for more information www.linear.com/LT8331 the esr can be minimized by using high quality x5r or x7r dielectric ceramic capacitors. in many applications, ceramic capacitors are sufficient to limit the output volt - age ripple. the rms ripple current rating of the output capacitor needs to be greater than: i rms(cout) > 0.3 ? ?i l2 inverting converter: selecting the dc coupling capacitor the dc voltage rating of the dc coupling capacitor (c dc , as shown in figure 10) should be larger than the maximum input voltage minus the output voltage (negative voltage): v cdc > v in(max) C v out c dc has nearly a rectangular current waveform. during the switch off-time, the current through c dc is i in , while approximately Ci o flows during the on-time. the rms rating of the coupling capacitor is determined by the fol- lowing equation: i rms(cdc) > i o(max) ? d max 1 ? d max a low esr and esl, x5r or x7r ceramic capacitor works well for c dc . applications information LT8331 8331fa
23 for more information www.linear.com/LT8331 typical applications 9v to 16v input, 135v boost converter 36v to 72v input,120v boost converter LT8331 8331fa c2 1f v out = 135v in sw1-2 en/uvlo LT8331 v in 9v to 16v l1 100h r1 1m 4ma at v in = 9v 8331 ta03 10ma at v in = 12v 17ma at v in = 16v sync/mode gnd fbx bias ss 200khz c3 1f c1 10f d1: rohm rb558va150tr v rt intv cc d1 8331 ta04 d1: rohm rb558va150tr l1: wurth elektronik we 744 066 101 c1: murata grj32dc72a475ke11l c3: united chemi-con kts251b105m55n0t00 r2 13.3k r3 1m r4 59k l1: wurth elektronik we-744 066 101 c1: murata grm31cr71e106ma12l c3: united chemi-con kts251b105m55n0t00 c4 0.1f r5 63.4k c2 1f v out = 120v in sw1-2 en/uvlo LT8331 v in 36v to 72v l1 100h r2 12.1k r1 1m 55ma at v in = 36v 100ma at v in = 72v sync/mode gnd fbx bias ss 450khz c3 1f r3 1m c1 4.7f v rt intv cc d1 75ma at v in = 48v r4 287k c4 0.1f r5 154k
24 for more information www.linear.com/LT8331 typical applications 10v to 48v input, 240v boost converter 36v to 72v input, 48v sepic converter LT8331 8331fa l1 330h r2 13.3k r3 1m r4 249k c2 0.22f r5 154k c4 1f v out1 in sw1-2 8331 ta05 en/uvlo LT8331 v in 10v to 48v r1 2m sync/mode gnd fbx bias ss c3 1 f 2 c5 0.1f c1 10f v rt intv cc d1 intv cc intv cc c7 4.7pf v out2 v out2 = 240v d2 15ma at v in = 12v 35ma at v in = 48v 30ma at v in = 36v 25ma at v in = 24v r6 100 1/4w 8331 ta06 d1: rohm rb558va150tr l1, l2: coiltronics drq127-221 c1: murata grm32er72a105ka01l c3: murata grj32dc72a475ke11l c5: murata grm31cr72a225ka73l r2 34.8k c5 2.2f d3 r3 1m r4 59k c4 0.1f r5 63.4k c2 1f v out = 48v in sw1-2 en/uvlo LT8331 c6 1 f v in 36v to 72v l1 220h r1 1m l2 220h 150ma at v in = 36v 165ma at v in = 48v 190ma at v in = 72v sync/mode gnd fbx d1, d2, d3: diodes inc. bav21w l1: sumida cdrh8d43rt125np-331mc c1: murata grm31cr61h106ka12l bias ss v out 450khz c3 4.7f 4 c1 1f 2 v rt intv cc d1 c3, c6: murata grm55dr72e105kw01l c5: murata grm31cr72d104kw03l c7: murata gqm2195c2e4r7cb12j 200khz
25 for more information www.linear.com/LT8331 typical applications 4.5v to 80v input, 12v sepic converter 4.5v to 80v input, 5v sepic converter LT8331 8331fa r5 63.4k c2 1f v out = 12v in sw1-2 en/uvlo LT8331 v in 4.5v to 80v l1 33h r1 1m 8331 ta07 l2 33h 75ma at v in = 4.5v 120ma at v in = 12v 120ma at v in = 24v 120ma at v in = 48v 120ma at v in = 80v sync/mode gnd fbx bias d1: rohm rb578vam100tr l1, l2: coiltronics drq74-330 c1: murata grm32er72a105ka01l ss v out 450khz c3 22f c1 1f 2 v rt intv cc d1 intv cc c3: murata grm32er71e226ke15l c5: murata grm31cr72a105ka01l intv cc 8331 ta08 d1: rohm rb578vam100tr l1, l2: coiltronics drq74-330 c1: murata grm32er72a105ka01l c3: murata grm31cr61a476me15l c5: murata grm31cr72a105ka01l r2 464k c5 1f r3 1m r4 787k c4 0.1f r5 100k r2 154k c2 1f v out = 5v in sw1-2 en/uvlo LT8331 v in 4.5v to 80v l1 33h r1 1m l2 33h c5 1f 130ma at v in = 4.5v 175ma at v in = 12v 180ma at v in = 24v 180ma at v in = 48v 180ma at v in = 80v sync/mode gnd fbx bias ss r3 1m v out 300khz c3 47f 2 c1 1f v rt intv cc d1 intv cc intv cc r4 787k c4 0.1f
26 for more information www.linear.com/LT8331 typical applications 36v to 72v input, C24v inverting converter 4.5v to 80v input, C12v inverting converter LT8331 8331fa r5 63.4k c2 1f v out = ?24v in sw1-2 en/uvlo LT8331 v in 36v to 72v l1 100h r1 1m 8331 ta09 l2 100h 175ma at v in = 36v 190ma at v in = 48v 200ma at v in = 72v sync/mode gnd fbx bias ss 450khz d1: rohm rb558va150tr l1, l2: coiltronics drq127-101 c1: murata grm32dc72a475k11l c3 10f c1 4.7f v rt intv cc d1 8331 ta10 d1: diodes inc. dfls1100 l1, l2: coiltronics drq74-330 c1: murata grm32er72a105ka01l c3: murata grm32er61a226ke20l c5: murata grm31cr72a105ka01l r2 71.5k c3: murata grm31cr61h106ka12l c5: murata grm32dc72a475k11l c5 1f r3 1m r4 787k c4 22nf r5 100k c2 1f v out = ?12v in sw1-2 en/uvlo r2 34.8k LT8331 v in 4.5v to 80v l1 33h r1 1m l2 33h 70ma at v in = 4.5v 80ma at v in = 12v 80ma at v in = 48v 80ma at v in = 80v sync/mode c5 4.7f gnd fbx bias ss 300khz c3 22f c1 1f 2 v rt intv cc r3 1m d1 r4 59k c4 0.1f
27 for more information www.linear.com/LT8331 4.5v to 80v input, C5v inverting converter typical applications LT8331 8331fa r5 100k c2 1f v out = ?5v in sw1-2 en/uvlo LT8331 v in 4.5v to 80v l1 33h r1 1m 8331 ta11 l2 33h 135ma at v in = 4.5v 170ma at v in = 12v 170ma at v in = 48v 170ma at v in = 80v sync/mode gnd fbx bias ss d1: diodes inc. dfls1100 l1, l2: coiltronics drq74-330 c1: murata grm32er72a105ka01l 300khz c3 22f 2 c1 1f 2 v rt intv cc d1 c3: murata grm32er61a226ke20l c5: murata grm31cr72a105ka01l r2 191k c5 1f r3 1m r4 787k c4 22nf
28 for more information www.linear.com/LT8331 package description please refer to http://www.linear.com/product/LT8331#packaging for the most recent package drawings. msop (mse16(12)) 0213 rev d 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 1.0 (.039) bsc 1.0 (.039) bsc 16 16 14 121110 1 3 5 6 7 8 9 9 1 8 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.10 (.201) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc bottom view of exposed pad option 2.845 0.102 (.112 .004) 2.845 0.102 (.112 .004) 4.039 0.102 (.159 .004) (note 3) 1.651 0.102 (.065 .004) 1.651 0.102 (.065 .004) 0.1016 0.0508 (.004 .002) 3.00 0.102 (.118 .004) (note 4) 0.280 0.076 (.011 .003) ref 4.90 0.152 (.193 .006) detail ?b? detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.12 ref 0.35 ref mse package variation: mse16 (12) 16-lead plastic msop with 4 pins removed exposed die pad (reference ltc dwg # 05-08-1871 rev d) LT8331 8331fa
29 for more information www.linear.com/LT8331 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 08/16 updated 10v to 48v input schematic 24 LT8331 8331fa
30 for more information www.linear.com/LT8331 ? linear technology corporation 2015 lt 0816 rev a ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/LT8331 related parts typical application part number description comments lt8300 100v in micropower isolated flyback converter with 150v/260ma switch v in = 6v to 100v, low i q monolithic no-opto flyback, 5-lead tsot - 23 lt8330 60v, 1a, low i q boost/sepic/inverting converter v in = 3v to 40v, v out(max) = 60v, i q = 6a (burst mode operation), 6-lead tsot-23, 3mm 2mm dfn packages lt8494 70v, 2a boost/sepic 1.5mhz high efficiency step-up dc/dc converter v in = 1v to 60v (2.5v to 32v start-up), v out(max) = 70v, i q = 3a (burst mode operation), i sd = <1a, 20-lead tssop lt8570/lt8570-1 65v, 500ma/250ma boost/inverting dc/dc converter v in(min) = 2.55v, v in(max) = 40v, v out(max) = 60v, i q = 1.2ma, i sd = <1ma, 3mm 3mm dfn-8, msop-8e lt8580 1a (i sw ), 65v, 1.5mhz, high efficiency step-up dc/dc converter v in : 2.55v to 40v, v out(max) = 65v, i q = 1.2ma, i sd = <1a, 3mm 3mm dfn-8, msop-8e 40v to 80v input, 5v isolated output converter efficiency load regulation LT8331 8331fa t1 d2 r2 3.24k c4 27nf r5 100k c2 1f v out = 5v 100ma in sw1-2 en/uvlo 1 LT8331 v in 40v to 80v r1 7.15k sync/mode gnd fbx bias ss c5 100f 2 c1 1f d1 v rt intv cc c3 4.7f r6 10 isolated flyback: v out = 5v v in = 40v v in = 80v load current (ma) 0 d1, d2: pmeg6010cej 20 40 60 80 100 120 50 55 60 65 t1: wurth elektronik 750311558 70 75 80 85 90 95 100 efficiency (%) 8331 ta02b load current (ma) c3: murata grm31cr61a475ka01l 0 20 40 60 80 100 120 4.2 4.3 4.4 c5: murata grm32er61a107me20l 4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 8331 ta02 5.5 5.6 5.7 5.8 v out (v) 8331 ta02c isolated flyback: v out = 5v v in = 40v v in = 80v 4 : 1

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